This application is based upon and claims the benefit of priority from the prior Japanese Patent Applications No. 2000-300833, filed Sep. 29, 2000; and No. 2001-102451, filed Mar. 30, 2001, the entire contents of both of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a flat panel display device and to the manufacturing method thereof, and for example, to an active matrix type liquid crystal display device, and to the manufacturing method thereof.
2. Description of the Related Art
The flat panel display device generally makes use of an auxiliary capacity in order to obtain a picture image of high quality, and in particular, makes use of an auxiliary capacity having an MOS (Metal Oxide Semiconductor) structure wherein a dielectric layer is sandwiched between a semiconductor layer and a metal layer in order to simplify the manufacturing method thereof.
As a typical example of this flat panel display device, there is known a liquid crystal display device for example. Since the liquid crystal display device is greatly advantageous in that it can be made thin and light-weight, and that the power consumption thereof is very low, the liquid crystal display device is extensively employed for a television, a word processor, and various kinds of office automation apparatus such as a display for personal computer.
As for the driving system of the liquid crystal display device, an active matrix type driving system is mainly employed, because of the fact that the active matrix type driving system is capable of obtaining an image of larger area and higher quality as compared with a simple matrix type driving system. This active matrix type driving system is designed such that a driving voltage is transmitted via a switching element to a liquid crystal, and one of the characteristics thereof is the memory retention action thereof. Namely, since this active matrix type driving system is capable of suppressing a leakage of electric charges kept in the auxiliary capacity even after the switching element has been turned OFF, it becomes possible to obtain an image of high quality.
However, there are a number of problems in this conventional liquid crystal display device provided with an auxiliary capacity having an MOS structure wherein a dielectric layer is sandwiched between a semiconductor layer and a metal layer. Namely, since a high voltage is always impressed to the dielectric layer in order to hold a capacity to a constant value, the dielectric layer tends to deteriorate, thus leading to an increase in the generation of leak current between the semiconductor layer and metal electrode or leading to the generation of short-circuit between the semiconductor layer and metal layer, thus resulting in the generation of point defect and hence deteriorating the quality and reliability of the display device.
It is an object of the present invention to provide a flat panel display device provided with an auxiliary capacity having a structure wherein a dielectric layer is sandwiched between a semiconductor layer and a metal layer, the flat panel display device being featured in that it is capable of minimizing voltage dependency of the auxiliary capacity, thereby making it possible to achieve a normal display even if a driving voltage is low.
It is another object of the present invention to provide a flat panel display device provided with an auxiliary capacity having a structure wherein a dielectric layer is sandwiched between a semiconductor layer and a metal layer, the flat panel display device being featured in that it is capable of minimizing point defects to be generated due to a deterioration of the dielectric layer, thus exhibiting excellent quality and reliability.
It is still another object of the present invention to provide a method of manufacturing a flat panel display device provided with an auxiliary capacity having a structure wherein a dielectric layer is sandwiched between a semiconductor layer and a metal layer, the method being featured in that it is capable of minimizing voltage dependency of the auxiliary capacity, thereby making it possible to achieve a normal display even if a driving voltage is low.
It is still another object of the present invention to provide a method of manufacturing a flat panel display device provided with an auxiliary capacity having a structure wherein a dielectric layer is sandwiched between a semiconductor layer and a metal layer, the method being featured in that it is capable of minimizing point defects to be generated due to a deterioration of the dielectric layer, thus enabling it to obtain a flat panel display device exhibiting excellent quality and reliability.
According to the present invention, there is provided a
flat panel display device comprising:
a thin film semiconductor switching element formed on a surface of a substrate;
a display electrode connected with the switching element;
a semiconductor layer for auxiliary capacity which is electrically connected with the display electrode;
a dielectric layer formed on a surface of the semiconductor layer for auxiliary capacity; and
a metal layer formed on a surface of the dielectric layer;
wherein the auxiliary capacity is constituted by the semiconductor layer for auxiliary capacity, the dielectric layer, and the metal layer; and the switching element includes a channel region, and a semiconductor layer having source and drain regions disposed to sandwich the channel region therebetween and implanted respectively with an n-type or p-type impurity ion, the impurity ion having the same as the impurity ion concentration being implanted into the source/drain regions is implanted into the semiconductor layer for auxiliary capacity in the same step, a surface concentration of the n-type or p-type impurity ion is in the range of 3.2xc3x971019 to 2.0xc3x971020 atoms/cm3.
Further, according to the present invention, there is provided a method of manufacturing a flat panel display device comprising: a thin film semiconductor switching element formed on a surface of a substrate; a display electrode connected with the switching element; a semiconductor layer for auxiliary capacity which is electrically connected with the display electrode; a dielectric layer formed on a surface of the semiconductor layer for auxiliary capacity; and a metal layer formed on a surface of the dielectric layer; wherein the auxiliary capacity is constituted by the semiconductor layer for auxiliary capacity, the dielectric layer, and the metal layer;
the method comprising the steps of:
depositing a layer of the semiconductor switching element on the substrate concurrent with a deposition of the semiconductor layer for auxiliary capacity on the substrate;
forming a mask pattern covering a region of the switching element which is subsequently turned into a channel region but exposing entire surfaces of source/drain regions of the switching element and of the semiconductor layer for auxiliary capacity;
implanting an impurity ion through the mask pattern into entire surfaces of source/drain regions of the switching element and of the semiconductor layer for auxiliary capacity;
depositing a metal layer and subjecting the metal layer to a patterning process to thereby form a gate electrode of the switching element and an auxiliary capacity line facing the semiconductor layer for auxiliary capacity.
Furthermore, according to the present invention, there is provided a flat panel display device comprising:
a thin film semiconductor switching element, and a thin film semiconductor element for driving circuit, both being formed on a surface of a substrate;
a display electrode connected with the switching element;
a semiconductor layer for auxiliary capacity which is electrically connected with the display electrode;
a dielectric layer formed on a surface of the semiconductor layer for auxiliary capacity; and
a metal layer formed on a surface of the dielectric layer;
wherein the auxiliary capacity is constituted by the semiconductor layer for auxiliary capacity, the dielectric layer, and the metal layer;
the thin film semiconductor element for driving circuit is provided with a semiconductor layer having a channel region bearing thereon a gate insulating film, and source/drain regions sandwiching the gate insulating film, each of source/drain regions being implanted with a predetermined concentration of impurity ions; and
the gate insulating film of the thin film semiconductor element for driving circuit contains not more than 1.1xc3x971013/cm2 in the number of defects per unit area.
Still further, according to the present invention, there is provided a flat panel display device comprising:
a thin film semiconductor switching element formed on a surface of a substrate;
a display electrode connected with the switching element;
a semiconductor layer for auxiliary capacity which is electrically connected with the display electrode;
a dielectric layer formed on a surface of the semiconductor layer for auxiliary capacity; and
a metal layer formed on a surface of the dielectric layer;
wherein the auxiliary capacity is constituted by the semiconductor layer for auxiliary capacity, the dielectric layer, and the metal layer; and the switching element includes a channel region, and a semiconductor layer having source and drain regions disposed to sandwich the channel region therebetween and implanted respectively with an n-type or p-type impurity ion, the impurity ion having the same as the impurity ion concentration being implanted into the source/drain regions is implanted into the semiconductor layer for auxiliary capacity in the same step, a carrier concentration thereof is 1.6xc3x971019 atoms/cm3 or more.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.